New Switched-Capacitor Pipelined ADC
نویسنده
چکیده
The paper deals with a new 12-bit low power switched-capacitor (SC) ADC for portable applications, such PDA, notebook etc. The paper describes design of ADC and its behavioural modelling regarding low power consumption. The Op-Amp sharing technique and capacitor scaling approach are utilized to obtain it. The basic block topology design is outlined too. The cancellation techniques to avoid the error sources rising of using SC technique for i.e. capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design. Key-Words: Pipelined ADC, switched-capacitor technique, portable application
منابع مشابه
Low Power SC Pipelined ADC Using Op-Amp Sharing Approach
The paper describes a case study of new 12-bit low power switched-capacitor (SC) ADC for portable applications. The paper is focused on block design of ADC and its behavioural modelling regarding low power consumption. It is reached by Op-Amp sharing technique utilisation. The basic block topology design is outlined too. The cancellation techniques for avoiding of capacitor mismatch, clock feed...
متن کاملBasic Block of Pipelined ADC Design Requirements
The paper describes design requirements of a basic stage (called MDAC Multiplying Digital-toAnalog Converter) of a pipelined ADC. There exist error sources such as finite DC gain of opamp, capacitor mismatch, thermal noise, etc., arising when the switched capacitor (SC) technique and CMOS technology are used. These non-idealities are explained and their influences on overall parameters of a pip...
متن کاملAnalysis of Non-ideal Effects of Pipelined ADC by Using MATLAB - Simulink
The presented work deals with analysis of non-ideal effect of pipelined analog-to-digital converter (ADC) such as random capacitor mismatch, comparator offset and finite op-amp gain. These factors arise during a conversion in the pipelined ADC when using CMOS technology and switched-capacitors (SC) technique. The pipelined ADC was simulated in MATLAB-Simulink simulation environment. Key-Words: ...
متن کاملModeling Memory Errors in Pipelined Analog-to-digital Converters
Switched-capacitor implementations of pipelined ADCs contain several sources of memory errors, including capacitor dielectric absorption/relaxation, incomplete stage reset at high clock rates, and parasitic capacitance effects when op amps are shared between subsequent pipeline stages. This paper describes these sources of memory errors and presents a unified model for their effect. The depende...
متن کاملComparator-based switched-capacitor pipelined analog-to-digital converter with comparator preset, and comparator delay compensation
We present a differential comparator-based switched-capacitor (CBSC) pipelined analog-to-digital converter (ADC) with comparator preset, and comparator delay compensation. Compensating for the comparator delay by digitally adjusting the comparator threshold improves the ADC resolution from 2.5-bit to 7.05-bit. The ADC is manufactured in a 90 nm CMOS technology, with a core area of 0.85 mm 9 0.3...
متن کامل